A novel approach for variation aware power minimization during gate sizing

Venkataraman Mahalingam, N. Ranganathan, Justin E. Harlow III. A novel approach for variation aware power minimization during gate sizing. In Wolfgang Nebel, Mircea R. Stan, Anand Raghunathan, Jörg Henkel, Diana Marculescu, editors, Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006. pages 174-179, ACM, 2006. [doi]

Abstract

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