Naresh Maheshwari, Sachin S. Sapatnekar. A Practical Algorithm for Retiming Level-Clocked Circuits. In 1996 International Conference on Computer Design (ICCD 96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings. pages 440, IEEE Computer Society, 1996. [doi]
Abstract is missing.