The following publications are possibly variants of this publication:
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- PERI: A Configurable Posit Enabled RISC-V CoreSugandha Tiwari, Neel Gala, Chester Rebeiro, V. Kamakoti 0001. taco, 18(3), 2021. [doi]
- CVA6 RISC-V Virtualization: Architecture, Microarchitecture, and Design Space ExplorationBruno Sá, Luca Valente, José Martins, Davide Rossi, Luca Benini, Sandro Pinto 0001. tvlsi, 31(11):1713-1726, November 2023. [doi]