Customizing the CVA6 RISC-V Core to Integrate Posit and Quire Instructions

David Mallasén, Raul Murillo 0001, Alberto A. Del Barrio, Guillermo Botella, Luis Piñuel, Manuel Prieto-Matías. Customizing the CVA6 RISC-V Core to Integrate Posit and Quire Instructions. In 37th Conference on Design of Circuits and Integrated Systems, DCIS 2022, Pamplona, Spain, November 16-18, 2022. pages 1-6, IEEE, 2022. [doi]

Abstract

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