Valavan Manohararajah, Gordon R. Chiu, Deshanand P. Singh, Stephen Dean Brown. Difficulty of predicting interconnect delay in a timing driven FPGA CAD flow. In Mike Hutton, Joni Dambre, editors, The Eigth International Workshop on System-Level Interconnect Prediction (SLIP 2006), Munich, Germany, March 4-5, 2006, Proceedings. pages 3-8, ACM, 2006. [doi]
@inproceedings{ManohararajahCSB06,
title = {Difficulty of predicting interconnect delay in a timing driven FPGA CAD flow},
author = {Valavan Manohararajah and Gordon R. Chiu and Deshanand P. Singh and Stephen Dean Brown},
year = {2006},
doi = {10.1145/1117278.1117280},
url = {http://doi.acm.org/10.1145/1117278.1117280},
tags = {data-flow},
researchr = {https://researchr.org/publication/ManohararajahCSB06},
cites = {0},
citedby = {0},
pages = {3-8},
booktitle = {The Eigth International Workshop on System-Level Interconnect Prediction (SLIP 2006), Munich, Germany, March 4-5, 2006, Proceedings},
editor = {Mike Hutton and Joni Dambre},
publisher = {ACM},
isbn = {1-59593-255-0},
}