Hardware Architecture of MAP Algorithm for Turbo Codes Implemented in a FPGA - researchr publication authors

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Roberto Ramírez Marín, Andrés David García García, Luis Fernando González Pérez, Javier Eduardo González Villarruel. Hardware Architecture of MAP Algorithm for Turbo Codes Implemented in a FPGA. In 15th International Conference on Electronics, Communications, and Computers (CONIELECOMP 2005), 28 February 2005 - 2 March 2005, Puebla, Mexico. pages 70-75, IEEE Computer Society, 2005. [doi]

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