Improved logic synthesis for memristive stateful logic using multi-memristor implication

Felipe S. Marranghello, Vinicius Callegaro, Mayler G. A. Martins, André Inácio Reis, Renato P. Ribas. Improved logic synthesis for memristive stateful logic using multi-memristor implication. In 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, Portugal, May 24-27, 2015. pages 181-184, IEEE, 2015. [doi]

Authors

Felipe S. Marranghello

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Vinicius Callegaro

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Mayler G. A. Martins

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André Inácio Reis

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Renato P. Ribas

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