Yield and power improvement method by post-silicon delay tuning and technology mapping

Hayato Mashiko, Yukihide Kohira. Yield and power improvement method by post-silicon delay tuning and technology mapping. In 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016, Jeju, South Korea, October 25-28, 2016. pages 366-369, IEEE, 2016. [doi]

@inproceedings{MashikoK16,
  title = {Yield and power improvement method by post-silicon delay tuning and technology mapping},
  author = {Hayato Mashiko and Yukihide Kohira},
  year = {2016},
  doi = {10.1109/APCCAS.2016.7803977},
  url = {http://dx.doi.org/10.1109/APCCAS.2016.7803977},
  researchr = {https://researchr.org/publication/MashikoK16},
  cites = {0},
  citedby = {0},
  pages = {366-369},
  booktitle = {2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016, Jeju, South Korea, October 25-28, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-1570-2},
}