A 1-Gb/s/pin 512-Mb DDRII SDRAM using a digital DLL and a slew-rate-controlled output buffer - researchr publication authors

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Tatsuya Matano, Yasuhiro Takai, Tsugio Takahashi, Yuusuke Sakito, Isamu Fujii, Yoshihiro Takaishi, Hiroki Fujisawa, Shuichi Kubouchi, Seiji Narui, Koji Arai, Makoto Morino, Masayuki Nakamura, Shinichi Miyatake, Toshihiro Sekiguchi, Kuniaki Koyama. A 1-Gb/s/pin 512-Mb DDRII SDRAM using a digital DLL and a slew-rate-controlled output buffer. J. Solid-State Circuits, 38(5):762-768, 2003. [doi]

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