Design Techniques for Bit-Parallel Galois Field Multipliers with On-Line Single Error Correction and Double Error Detection

Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan. Design Techniques for Bit-Parallel Galois Field Multipliers with On-Line Single Error Correction and Double Error Detection. In 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 7-9 July 2008, Rhodes, Greece. pages 16-21, IEEE, 2008. [doi]

@inproceedings{MathewJP08,
  title = {Design Techniques for Bit-Parallel Galois Field Multipliers with On-Line Single Error Correction and Double Error Detection},
  author = {Jimson Mathew and Abusaleh M. Jabir and Dhiraj K. Pradhan},
  year = {2008},
  doi = {10.1109/IOLTS.2008.34},
  url = {http://doi.ieeecomputersociety.org/10.1109/IOLTS.2008.34},
  tags = {design},
  researchr = {https://researchr.org/publication/MathewJP08},
  cites = {0},
  citedby = {0},
  pages = {16-21},
  booktitle = {14th IEEE International On-Line Testing Symposium (IOLTS 2008), 7-9 July 2008, Rhodes, Greece},
  publisher = {IEEE},
  isbn = {978-0-7695-3264-6},
}