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Sub-500-ps 64-b ALUs in 0.18-/spl mu/m SOI/bulk CMOS: design and scaling trends

Sanu K. Mathew, Ram K. Krishnamurthy, Mark A. Anders 0001, Rafael Rios, Kaizad R. Mistry, Krishnamurthy Soumyanath. Sub-500-ps 64-b ALUs in 0.18-/spl mu/m SOI/bulk CMOS: design and scaling trends. J. Solid-State Circuits, 36(11):1636-1646, 2001. [doi]

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Sanu K. Mathew

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Ram K. Krishnamurthy

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Mark A. Anders 0001

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Rafael Rios

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Kaizad R. Mistry

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Krishnamurthy Soumyanath

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