Timing Driven Placement Reconfiguration for Fault Tolerance and Yield Enhancement in FPGAs - researchr publication authors

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Anmol Mathur, C. L. Liu. Timing Driven Placement Reconfiguration for Fault Tolerance and Yield Enhancement in FPGAs. In 1996 European Design and Test Conference, ED&TC 1996, Paris, France, March 11-14, 1996. pages 165-169, IEEE Computer Society, 1996. [doi]

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