Anmol Mathur, C. L. Liu. Timing Driven Placement Reconfiguration for Fault Tolerance and Yield Enhancement in FPGAs. In 1996 European Design and Test Conference, ED&TC 1996, Paris, France, March 11-14, 1996. pages 165-169, IEEE Computer Society, 1996. [doi]
@inproceedings{MathurL96,
title = {Timing Driven Placement Reconfiguration for Fault Tolerance and Yield Enhancement in FPGAs},
author = {Anmol Mathur and C. L. Liu},
year = {1996},
doi = {10.1109/EDTC.1996.494143},
url = {http://doi.ieeecomputersociety.org/10.1109/EDTC.1996.494143},
researchr = {https://researchr.org/publication/MathurL96},
cites = {0},
citedby = {0},
pages = {165-169},
booktitle = {1996 European Design and Test Conference, ED&TC 1996, Paris, France, March 11-14, 1996},
publisher = {IEEE Computer Society},
isbn = {0-8186-7423-7},
}