Toshinobu Matsuba, Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada. Aggressive Register Unsharing Based on SSA Transformation for Clock Enhancement in High-Level Synthesis. In Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010. pages 87-92, IEEE Computer Society, 2010. [doi]
Abstract is missing.