Table of Contents

• Test and Repair Scheduling for Built-In Self-Repair RAMs in SOCsChih-Sheng Hou, Jin-Fu Li, Che-Wei Chou. 3-7 [doi]
• (Some) Open Problems to Incorporate BIST in Complex Heterogeneous Integrated SystemsManuel J. Barragan Asian, Gloria Huertas, Adoración Rueda, José Luis Huertas. 8-13 [doi]
• Fast Fault Simulation for Extended Class of Faults in Scan Path CircuitsRaimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman. 14-19 [doi]
• Enabling False Path Identification from RTL for Reducing Design and Test FutilenessHiroshi Iwata, Satoshi Ohtake, Hideo Fujiwara. 20-25 [doi]
• Least-squares Optimal Interpolation for Fast Image Super-resolutionAndrew Gilman, Donald G. Bailey, Stephen Marsland. 29-34 [doi]
• Design, Fabrication and Characterization of Asymmetric Fabry-Perot Modulator for Large Size Optical ShutterByung Hoon Na, Kwang Mo Park, Sooraj R., Bong Kyu Jeong, Young-Min Song, Yong Tak Lee, Chang-Soo Park. 35-38 [doi]
• A Hybrid CMOS DPS with Conditional Data Readout SchemeKa Lai Lau, Sylvain Leomant, Amine Bermak. 44-47 [doi]
• A 75dB-gain Low-power, Low-noise Amplifier for Low-frequency Bio-signal RecordingDalila Salhi, Balwant Godara. 51-53 [doi]
• A Low-Power Associative Processor with the R-th Nearest-Match Hamming-Distance Search Engine Employing Time-Domain TechniquesTrong Tu Bui, Tadashi Shibata. 54-57 [doi]
• Energy-aware Filter Cache Architecture for Multicore ProcessorsYoung-Jin Park, Hong Jun Choi, Cheol Hong Kim, Jong Myon Kim. 58-62 [doi]
• Leakage-Aware Scheduling for (m, k)-Firm Real-Time SystemsLinwei Niu. 63
• Independent Component Analysis Applied to Watermark Extraction and its Implemented Model on FPGAsThuong Le-Tien, Dien Vo-Ngoc, Lan Ngo-Hoang, Sung Young Lee. 71-76 [doi]
• Algorithm Transformation for FPGA ImplementationDonald G. Bailey, Christopher T. Johnston. 77-81 [doi]
• Designing a Harware Accelerator for Face Recognition Using Vector Quantization and Principal Component Analysis as a Component of SoPCDiem Tran, Thi To, Thuan Huynh, Phuong Nguyen. 82-86 [doi]
• Aggressive Register Unsharing Based on SSA Transformation for Clock Enhancement in High-Level SynthesisToshinobu Matsuba, Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada. 87-92 [doi]
• 16-QAM Transmitter and Receiver Design Based on FPGAXuan-Thang Vu, Nguyen Anh Duc, Trinh Anh Vu. 95-98 [doi]
• A More Precise Model of Noise Based PCMOS ErrorsArun Bhanu, Mark S. K. Lau, Keck Voon Ling, Vincent John Mooney III, Anshul Singh. 99-102 [doi]
• A Smart CMOS Image Sensor with On-chip Hot Pixel Correcting Readout Circuit for Biomedical ApplicationsYuan Cao, Fang Tang, Amine Bermak, Thinh Le. 103-107 [doi]
• CPU Testability in Embedded SystemsJanusz Sosnowski, Lukasz Tupaj. 108-112 [doi]
• Wide Band Linear Voltage-to-Current Converter DesignChun-Wei Lin, Sheng-Feng Lin, Chi Fu Wang. 115-120 [doi]
• DVCC-Based Voltage-Mode Biquadratic Filter with High-Input ImpedanceWei-Yuan Chiu, Jiun-Wei Horng, Hung Lee, Chen-Chuan Huang. 121-125 [doi]
• A 1.5-V, 2.4-GHz-Band CMOS Low-Noise Amplifier with Modified Input Matching NetworkSoheil Ziabakhsh, Majid Ebrahimian. 126
• Channel Auto-Correlation and Doppler Spectrum of MIMO Systems Using Circular ArrayHuu Phu Bui, Le Khoa Dang, Anh Vinh Nguyen. 135-138 [doi]
• FPGA Implementation of a Real Time Maximum Likelihood Space-Time Decoder on a MIMO Software Radio Test PlatformPeter J. Green, Desmond P. Taylor. 139-143 [doi]
• Inverse Neural MIMO NARX Model Identification of Nonlinear System Optimized with PSOHo Pham Huy Anh, Nguyen Huu Phuc. 144-149 [doi]
• An Adaptive Huffman Decoding Algorithm for MP3 DecoderHoang-Anh Pham, Van-Hieu Bui, Anh-Vu Dinh-Duc. 153-157 [doi]
• An Event-Assisted Sequencer to Accelerate Matrix AlgorithmsAdam Burdeniuk, Kiet N. To, Cheng-Chew Lim, Michael J. Liebelt. 158-163 [doi]
• An Exact and Efficient Critical Path Tracing AlgorithmAlberto Bosio, Patrick Girard, Serge Pravossoudovitch, Paolo Bernardi, Matteo Sonza Reorda. 164-169 [doi]
• A Four-Stage Design Approach Towards Securing a Vehicular Ad Hoc Networks ArchitectureRaghu Sunnadkal, Ben Soh, Hien Phan. 177-182 [doi]
• An Efficient Hardware Implementation for a Reciprocal UnitAndreas Habegger, Andreas Stahel, Josef Goette, Marcel Jacomet. 183-187 [doi]
• Project-Based Learning in Robotics and Electronics in Undergraduate Engineering Program SettingA. Price, R. Rimington, M. T. Chew, Serge N. Demidenko. 188-193 [doi]
• Modelling of Power Distribution Network and Decoupling Network Design for High Speed VLSI DesignAbhishek Pathak, Sushanta K. Mandal, Raj Kumar Nagpal, Rakesh Malik. 194
• Modeling of Probabilistic Ripple-Carry AddersMark S. K. Lau, Keck Voon Ling, Yun-Chung Chu, Arun Bhanu. 201-206 [doi]
• A High-speed 32-bit Signed/Unsigned Pipelined MultiplierQingzheng Li, Guixuan Liang, Amine Bermak. 207-211 [doi]
• Notations for Multiphase PipelinesChristopher T. Johnston, Donald G. Bailey, Paul J. Lyons. 212-216 [doi]
• Massively Parallel Cuckoo Pattern Matching Applied for NIDS/NIPSThinh Ngoc Tran, Surin Kittitornkun. 217-221 [doi]
• An ECG-on-Chip for Wearable Cardiac Monitoring DevicesChacko John Deepu, Xiaoyuan Xu, Xiaodan Zou, Libin Yao, Yong Lian. 225-228 [doi]
• Nanomanipulation of Living Cells on a Chip Using Electric Field: General Concepts and MicrodevicesJulien Villemejane, Guillaume Mottet, Olivier Français, Bruno Le Pioufle, Jean-Pierre Lefevre, Marion Woytasik, Elisabeth Dufour-Gergam, Lluis M. Mir. 229-232 [doi]
• Detection of Electrical Activity of Pancreatic Beta-cells Using Micro-electrode ArraysYannick Bornat, Matthieu Raoux, Youssef Boutaib, Fabrice Morin, Gilles Charpentier, Jochen Lang, Sylvie Renaud. 233-236 [doi]
• Integrated Multiplexer for Nerve ElectrodesZeng Lertmanorat, Dominique M. Durand. 237 [doi]
• An Innovative 6T Hybrid SRAM Cell in sub-32 nm Double-Gate MOS TechnologyAmara Amara, Bastien Giraud, Olivier Thomas. 241-244 [doi]
• RunPaul Beckett, Heiko Rudolph. 245-249 [doi]
• A Novel Design Framework for Business Process Modelling in Automotive IndustryZwikamu Dubani, Ben Soh, Chris Seeling. 250-255 [doi]
• Evaluation of Resistance to Differential Power Analysis: Execution Time Optimizations for DesignersGiorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. 256-261 [doi]
• Impact of Resistive-Bridging Defects in SRAM Core-CellRenan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine. 265-269 [doi]
• Design of an Infrastructural IP Dependability Manager for a Dependable Reconfigurable Many-Core ProcessorHans G. Kerkhoff, Xiao Zhang. 270-275 [doi]
• Fast and Accurate Automatic Defect CLuster Extraction for Semiconductor WafersMelanie Po-Leen Ooi, Chris Chan, Wey Jean Tee, Ye Chow Kuang, Lindsay Kleeman, Serge N. Demidenko. 276-280 [doi]
• Estimating Error-probability and its Application for Optimizing Roll-back Recovery with CheckpointingDimitar Nikolov, Urban Ingelsson, Virendra Singh, Erik Larsson. 281-285 [doi]
• Hazard-free Muller Gates for Implementing Asynchronous Circuits on Xilinx FPGACuong Pham-Quoc, Anh-Vu Dinh-Duc. 289-292 [doi]
• A Pseudo-Boolean Technique for Generating Compact Transition Tests with All-Output-Propagation PropertiesTsuyoshi Iwagaki, Mineo Kaneko. 293-296 [doi]
• Routing and Tracking System for Mobile Vehicles in Large AreaThuong Le-Tien, Vu Phung-The. 297-300 [doi]
• Digital Logic Implementation in Memristor-Based Crossbars - A TutorialTezaswi Raja, Samiha Mourad. 303-309 [doi]
• Virtual Instrumentation Based IC Parametric Tester for Engineering EducationLoren Nolan, Moi-Tin Chew, Serge N. Demidenko, Melanie Po-Leen Ooi. 310-315 [doi]
• Very High Q, NEMS Inductor for 12GHz Wireless Sensor ApplicationsN. Khalid, Jugdutt Singh, Hai Phuong Le, K. Shah, John Devlin, Z. Sauli. 319-324 [doi]
• Reconfigurable multivariable MEMS sensor arrayStephen Paul van der Velden, Jugdutt Singh. 325-329 [doi]
• Read-out Circuit Analysis for High-speed Low-noise VCO Based APS CMOS Image SensorFang Tang, Amine Bermak. 330-335 [doi]
• Modelling, Simulation and Design of Front End Electronics for Radiation DetectorsDavid Fitrio, Goran Panjkovic, Suhardi Tjoa, Andrew Berry. 336
• A Fast Threshold Test Generation Algorithm Based on 5-Valued LogicTomoo Inoue, Nobukazu Izumi, Yuki Yoshikawa, Hideyuki Ichihara. 345-349 [doi]
• Low Frequency Test for RF MEMS SwitchesGustavo P. Rehder, Salvador Mir, Libor Rufer, Emmanuel Simeu, Hoang N. Nguyen. 350-354 [doi]
• The Discrimination of Metallic Coins Using a Scan Type Magnetic CameraJongwoo Jun, Jinyi Lee, Jaesun Lee. 355-359 [doi]
• Evaluating the Performance of Different Classification Algorithms for Fabricated Semiconductor WafersJian Wei Cheng, Melanie Po-Leen Ooi, Chris Chan, Ye Chow Kuang, Serge N. Demidenko. 360-366 [doi]