A Floating Gate MOS Implementation of Resistive Fuse

Takashi Matsumoto, T. Sawaji, T. Sakai, H. Nagai. A Floating Gate MOS Implementation of Resistive Fuse. Neural Computation, 10(2):485-498, 1998.

Authors

Takashi Matsumoto

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T. Sawaji

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T. Sakai

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H. Nagai

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