A Floating Gate MOS Implementation of Resistive Fuse

Takashi Matsumoto, T. Sawaji, T. Sakai, H. Nagai. A Floating Gate MOS Implementation of Resistive Fuse. Neural Computation, 10(2):485-498, 1998.

@article{MatsumotoSSN98,
  title = {A Floating Gate MOS Implementation of Resistive Fuse},
  author = {Takashi Matsumoto and T. Sawaji and T. Sakai and H. Nagai},
  year = {1998},
  researchr = {https://researchr.org/publication/MatsumotoSSN98},
  cites = {0},
  citedby = {0},
  journal = {Neural Computation},
  volume = {10},
  number = {2},
  pages = {485-498},
}