Ryosuke Matsuo, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera, Akihiko Shinya, Masaya Notomi. A Synthesis Method for Power-Efficient Integrated Optical Logic Circuits Towards Light Speed Processing. In 2020 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2020, Limassol, Cyprus, July 6-8, 2020. pages 488-493, IEEE, 2020. [doi]
@inproceedings{MatsuoSIOSN20,
title = {A Synthesis Method for Power-Efficient Integrated Optical Logic Circuits Towards Light Speed Processing},
author = {Ryosuke Matsuo and Jun Shiomi and Tohru Ishihara and Hidetoshi Onodera and Akihiko Shinya and Masaya Notomi},
year = {2020},
doi = {10.1109/ISVLSI49217.2020.000-9},
url = {https://doi.org/10.1109/ISVLSI49217.2020.000-9},
researchr = {https://researchr.org/publication/MatsuoSIOSN20},
cites = {0},
citedby = {0},
pages = {488-493},
booktitle = {2020 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2020, Limassol, Cyprus, July 6-8, 2020},
publisher = {IEEE},
isbn = {978-1-7281-5775-7},
}