Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano, Tsutomu Yoshinaga. Prediction router: Yet another low latency on-chip router architecture. In 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 14-18 February 2009, Raleigh, North Carolina, USA. pages 367-378, IEEE Computer Society, 2009. [doi]
Abstract is missing.