Computing Logic-Stage Delays Using Circuit Simulation and Symbolic Elmore Analysis

Clayton B. McDonald, Randal E. Bryant. Computing Logic-Stage Delays Using Circuit Simulation and Symbolic Elmore Analysis. In Proceedings of the 38th Design Automation Conference, DAC 2001, Las Vegas, NV, USA, June 18-22, 2001. pages 283-288, ACM, 2001. [doi]

Abstract

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