FPGA Realization of FIR Filters by Efficient and Flexible Systolization Using Distributed Arithmetic

P. K. Meher, Shrutisagar Chandrasekaran, Abbes Amira. FPGA Realization of FIR Filters by Efficient and Flexible Systolization Using Distributed Arithmetic. IEEE Transactions on Signal Processing, 56(7-1):3009-3017, 2008. [doi]

Authors

P. K. Meher

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Shrutisagar Chandrasekaran

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Abbes Amira

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