P. K. Meher, Shrutisagar Chandrasekaran, Abbes Amira. FPGA Realization of FIR Filters by Efficient and Flexible Systolization Using Distributed Arithmetic. IEEE Transactions on Signal Processing, 56(7-1):3009-3017, 2008. [doi]
@article{MeherCA08,
title = {FPGA Realization of FIR Filters by Efficient and Flexible Systolization Using Distributed Arithmetic},
author = {P. K. Meher and Shrutisagar Chandrasekaran and Abbes Amira},
year = {2008},
doi = {10.1109/TSP.2007.914926},
url = {http://dx.doi.org/10.1109/TSP.2007.914926},
researchr = {https://researchr.org/publication/MeherCA08},
cites = {0},
citedby = {0},
journal = {IEEE Transactions on Signal Processing},
volume = {56},
number = {7-1},
pages = {3009-3017},
}