Preetisudha Meher, Kamala Kanta Mahapatra. High-performance noise tolerant comparator design for arithmetic circuits. In International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2016, Phuket, Thailand, October 24-27, 2016. pages 1-4, IEEE, 2016. [doi]
@inproceedings{MeherM16,
title = {High-performance noise tolerant comparator design for arithmetic circuits},
author = {Preetisudha Meher and Kamala Kanta Mahapatra},
year = {2016},
doi = {10.1109/ISPACS.2016.7824678},
url = {http://dx.doi.org/10.1109/ISPACS.2016.7824678},
researchr = {https://researchr.org/publication/MeherM16},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2016, Phuket, Thailand, October 24-27, 2016},
publisher = {IEEE},
isbn = {978-1-5090-0629-8},
}