In-situ power monitoring scheme and its application in dynamic voltage and threshold scaling for digital CMOS integrated circuits

Nandish Ashutosh Mehta, Gururaj V. Naik, Bharadwaj S. Amrutur. In-situ power monitoring scheme and its application in dynamic voltage and threshold scaling for digital CMOS integrated circuits. In Vojin G. Oklobdzija, Barry Pangle, Naehyuck Chang, Naresh R. Shanbhag, Chris H. Kim, editors, Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010. pages 259-264, ACM, 2010. [doi]

Abstract

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