Evaluation of pausible clocking for interfacing high speed IP cores in GALS Framework

Joycee Mekie, Supratik Chakraborty, Dinesh K. Sharma. Evaluation of pausible clocking for interfacing high speed IP cores in GALS Framework. In 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India. pages 559-564, IEEE Computer Society, 2004. [doi]

Abstract

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