Automatic Location of IC Design Errors Using Beam System

M. Melgara, M. Battu, P. Garino, J. Dowe, Y. J. Vernay, M. Marzouki, F. Boland. Automatic Location of IC Design Errors Using Beam System. In Proceedings International Test Conference 1988, Washington, D.C., USA, September 1988. pages 898-907, IEEE Computer Society, 1988.

Authors

M. Melgara

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M. Battu

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P. Garino

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J. Dowe

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Y. J. Vernay

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M. Marzouki

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F. Boland

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