2 SPDT switch with 3.3dB loss and 23.7dB isolation in 65nm bulk CMOS - researchr publication authors

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Fanyi Meng, Kaixue Ma, Kiat Seng Yeo. 2 SPDT switch with 3.3dB loss and 23.7dB isolation in 65nm bulk CMOS. In 2015 IEEE International Solid-State Circuits Conference, ISSCC 2015, Digest of Technical Papers, San Francisco, CA, USA, February 22-26, 2015. pages 1-3, IEEE, 2015. [doi]

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