Modular Synthesis of Timed Circuits using Partial Order Reduction

Eric Mercer, Chris J. Myers, Tomohiro Yoneda. Modular Synthesis of Timed Circuits using Partial Order Reduction. Electronic Notes in Theoretical Computer Science, 65(6):180-201, 2002. [doi]

@article{MercerMY02,
  title = {Modular Synthesis of Timed Circuits using Partial Order Reduction},
  author = {Eric Mercer and Chris J. Myers and Tomohiro Yoneda},
  year = {2002},
  url = {http://www.elsevier.com/gej-ng/31/29/23/117/51/show/Products/notes/index.htt#013},
  researchr = {https://researchr.org/publication/MercerMY02},
  cites = {0},
  citedby = {0},
  journal = {Electronic Notes in Theoretical Computer Science},
  volume = {65},
  number = {6},
  pages = {180-201},
}