Critical Path Delay Reduction in FPGAs with Unbalanced Lookup Times - researchr publication authors

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Jason Meyer, Fatih Kocan, Daniel G. Saab. Critical Path Delay Reduction in FPGAs with Unbalanced Lookup Times. In Toomas P. Plaks, editor, Proceedings of the 2007 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA 2007, Las Vegas, Nevada, USA, June 25-28, 2007. pages 182-190, CSREA Press, 2007.

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