Metric Definition for Circuit Speed Optimization

Xavier Michel, Alexandre Verle, Nadine Azémard, Philippe Maurine, Daniel Auvergne. Metric Definition for Circuit Speed Optimization. In Jorge Juan-Chico, Enrico Macii, editors, Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 13th International Workshop, PATMOS 2003, Torino, Italy, September 10-12, 2003, Proceedings. Volume 2799 of Lecture Notes in Computer Science, pages 451-460, Springer, 2003. [doi]

Authors

Xavier Michel

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Alexandre Verle

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Nadine Azémard

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Philippe Maurine

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Daniel Auvergne

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