Latency reduction of fault-tolerant NoCs by employing multiple paths

Ronaldo T. P. Milfont, Rafael Goncalves Mota, João M. Ferreira, Paulo C. Cortez, César A. M. Marcon, Daniel A. B. Tavares, Jarbas A. N. Silveira. Latency reduction of fault-tolerant NoCs by employing multiple paths. In Jarbas A. N. Silveira, editor, Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, SBCCI 2017, Fortaleza - Ceará , Brazil, August 28 - September 01, 2017. pages 72-78, ACM, 2017. [doi]

Authors

Ronaldo T. P. Milfont

This author has not been identified. Look up 'Ronaldo T. P. Milfont' in Google

Rafael Goncalves Mota

This author has not been identified. Look up 'Rafael Goncalves Mota' in Google

João M. Ferreira

This author has not been identified. Look up 'João M. Ferreira' in Google

Paulo C. Cortez

This author has not been identified. Look up 'Paulo C. Cortez' in Google

César A. M. Marcon

This author has not been identified. Look up 'César A. M. Marcon' in Google

Daniel A. B. Tavares

This author has not been identified. Look up 'Daniel A. B. Tavares' in Google

Jarbas A. N. Silveira

This author has not been identified. Look up 'Jarbas A. N. Silveira' in Google