Latency reduction of fault-tolerant NoCs by employing multiple paths

Ronaldo T. P. Milfont, Rafael Goncalves Mota, João M. Ferreira, Paulo C. Cortez, César A. M. Marcon, Daniel A. B. Tavares, Jarbas A. N. Silveira. Latency reduction of fault-tolerant NoCs by employing multiple paths. In Jarbas A. N. Silveira, editor, Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, SBCCI 2017, Fortaleza - Ceará , Brazil, August 28 - September 01, 2017. pages 72-78, ACM, 2017. [doi]

@inproceedings{MilfontMFCMTS17,
  title = {Latency reduction of fault-tolerant NoCs by employing multiple paths},
  author = {Ronaldo T. P. Milfont and Rafael Goncalves Mota and João M. Ferreira and Paulo C. Cortez and César A. M. Marcon and Daniel A. B. Tavares and Jarbas A. N. Silveira},
  year = {2017},
  doi = {10.1145/3109984.3109985},
  url = {http://doi.acm.org/10.1145/3109984.3109985},
  researchr = {https://researchr.org/publication/MilfontMFCMTS17},
  cites = {0},
  citedby = {0},
  pages = {72-78},
  booktitle = {Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, SBCCI 2017, Fortaleza - Ceará , Brazil, August 28 - September 01, 2017},
  editor = {Jarbas A. N. Silveira},
  publisher = {ACM},
  isbn = {978-1-4503-5106-5},
}