Timothy N. Miller, Renji Thomas, Xiang Pan, Radu Teodorescu. VRSync: Characterizing and eliminating synchronization-induced voltage emergencies in many-core processors. In 39th International Symposium on Computer Architecture (ISCA 2012), June 9-13, 2012, Portland, OR, USA. pages 249-260, IEEE, 2012. [doi]
Abstract is missing.