Mapping for better than worst-case delays in LUT-based FPGA designs

Kirill Minkovich, Jason Cong. Mapping for better than worst-case delays in LUT-based FPGA designs. In Mike Hutton, Paul Chow, editors, Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008. pages 56-64, ACM, 2008. [doi]

Abstract

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