Domain Specific ReRAM Computation-in-Memory Design Considering Bit Precision and Memory Errors for Simulated Annealing

Naoko Misawa, Kenta Taoka, Chihiro Matsui, Ken Takeuchi. Domain Specific ReRAM Computation-in-Memory Design Considering Bit Precision and Memory Errors for Simulated Annealing. In IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022. pages 3289-3293, IEEE, 2022. [doi]

@inproceedings{MisawaTMT22,
  title = {Domain Specific ReRAM Computation-in-Memory Design Considering Bit Precision and Memory Errors for Simulated Annealing},
  author = {Naoko Misawa and Kenta Taoka and Chihiro Matsui and Ken Takeuchi},
  year = {2022},
  doi = {10.1109/ISCAS48785.2022.9937947},
  url = {https://doi.org/10.1109/ISCAS48785.2022.9937947},
  researchr = {https://researchr.org/publication/MisawaTMT22},
  cites = {0},
  citedby = {0},
  pages = {3289-3293},
  booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022},
  publisher = {IEEE},
  isbn = {978-1-6654-8485-5},
}