Domain Specific ReRAM Computation-in-Memory Design Considering Bit Precision and Memory Errors for Simulated Annealing

Naoko Misawa, Kenta Taoka, Chihiro Matsui, Ken Takeuchi. Domain Specific ReRAM Computation-in-Memory Design Considering Bit Precision and Memory Errors for Simulated Annealing. In IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022. pages 3289-3293, IEEE, 2022. [doi]

Abstract

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