Researchr is a web site for finding, collecting, sharing, and reviewing scientific publications, for researchers by researchers.
Sign up for an account to create a profile with publication list, tag and review your related work, and share bibliographies with your co-authors.
Oliver Mitea, Markus Meissner, Lars Hedrich, P. Jores. Automated constraint-driven topology synthesis for analog circuits. In Design, Automation and Test in Europe, DATE 2011, Grenoble, France, March 14-18, 2011. pages 1662-1665, IEEE, 2011. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Topology synthesis of analog circuits with yield optimization and evaluation using pareto frontsOliver Mitea, Markus Meissner, Lars Hedrich. vlsi 2011: 78-81 [doi] An approach to topology synthesis of analog circuits using hierarchical blocks and symbolic analysisXiaoying Wang, Lars Hedrich. aspdac 2006: 700-705 [doi]
The following publications are possibly variants of this publication: