Sajib Kumar Mitra, Ahsan Raja Chowdhury. Minimum Cost Fault Tolerant Adder Circuits in Reversible Logic Synthesis. In Vishwani D. Agrawal, Srimat T. Chakradhar, editors, 25th International Conference on VLSI Design, VLSID 2012, Hyderabad, India, January 7-11, 2012. pages 334-339, IEEE, 2012. [doi]
Abstract is missing.