Compact Modeling for Power Efficient Circuit Design

Mitiko Miura-Mattausch, Hideyuki Kikuchihara, T. Kajiwara, Yuta Tanimoto, Atsushi Saito, Takahiro Iizuka, D. Navarro, Hans Jürgen Mattausch. Compact Modeling for Power Efficient Circuit Design. In 48th European Solid-State Device Research Conference, ESSDERC 2018, Dresden, Germany, September 3-6, 2018. pages 234-237, IEEE, 2018. [doi]

@inproceedings{Miura-Mattausch18-0,
  title = {Compact Modeling for Power Efficient Circuit Design},
  author = {Mitiko Miura-Mattausch and Hideyuki Kikuchihara and T. Kajiwara and Yuta Tanimoto and Atsushi Saito and Takahiro Iizuka and D. Navarro and Hans Jürgen Mattausch},
  year = {2018},
  doi = {10.1109/ESSDERC.2018.8486858},
  url = {https://doi.org/10.1109/ESSDERC.2018.8486858},
  researchr = {https://researchr.org/publication/Miura-Mattausch18-0},
  cites = {0},
  citedby = {0},
  pages = {234-237},
  booktitle = {48th European Solid-State Device Research Conference, ESSDERC 2018, Dresden, Germany, September 3-6, 2018},
  publisher = {IEEE},
  isbn = {978-1-5386-5401-9},
}