Highly Energy-Efficient SRAM With Hierarchical Bit Line Charge-Sharing Method Using Non-Selected Bit Line Charges - researchr publication authors

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Shinji Miyano, Shinichi Moriwaki, Yasue Yamamoto, Atsushi Kawasumi, Toshikazu Suzuki, Takayasu Sakurai, Hirofumi Shinohara. Highly Energy-Efficient SRAM With Hierarchical Bit Line Charge-Sharing Method Using Non-Selected Bit Line Charges. J. Solid-State Circuits, 48(4):924-931, 2013. [doi]

This author has not been identified. Look up 'Shinji Miyano' in GoogleThis author has not been identified. Look up 'Shinichi Moriwaki' in GoogleThis author has not been identified. Look up 'Yasue Yamamoto' in GoogleThis author has not been identified. Look up 'Atsushi Kawasumi' in GoogleThis author has not been identified. Look up 'Toshikazu Suzuki' in GoogleThis author has not been identified. Look up 'Takayasu Sakurai' in GoogleThis author has not been identified. Look up 'Hirofumi Shinohara' in Google

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