An 18-μA standby current 1.8-V, 200-MHz microprocessor with self-substrate-biased data-retention mode

Hiroyuki Mizuno, Koichiro Ishibashi, Takanori Shimura, Toshihiro Hattori, Susumu Narita, Kenji Shiozawa, Shuji Ikeda, Kunio Uchiyama. An 18-μA standby current 1.8-V, 200-MHz microprocessor with self-substrate-biased data-retention mode. J. Solid-State Circuits, 34(11):1492-1500, 1999. [doi]

@article{MizunoISHNSIU99,
  title = {An 18-μA standby current 1.8-V, 200-MHz microprocessor with self-substrate-biased data-retention mode},
  author = {Hiroyuki Mizuno and Koichiro Ishibashi and Takanori Shimura and Toshihiro Hattori and Susumu Narita and Kenji Shiozawa and Shuji Ikeda and Kunio Uchiyama},
  year = {1999},
  doi = {10.1109/4.799853},
  url = {https://doi.org/10.1109/4.799853},
  researchr = {https://researchr.org/publication/MizunoISHNSIU99},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {34},
  number = {11},
  pages = {1492-1500},
}