An efficient dynamically reconfigurable on-chip network architecture - researchr publication authors

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Mehdi Modarressi, Hamid Sarbazi-Azad, Arash Tavakkol. An efficient dynamically reconfigurable on-chip network architecture. In Sachin S. Sapatnekar, editor, Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010. pages 166-169, ACM, 2010. [doi]

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