An efficient dynamically reconfigurable on-chip network architecture

Mehdi Modarressi, Hamid Sarbazi-Azad, Arash Tavakkol. An efficient dynamically reconfigurable on-chip network architecture. In Sachin S. Sapatnekar, editor, Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010. pages 166-169, ACM, 2010. [doi]

@inproceedings{ModarressiST10,
  title = {An efficient dynamically reconfigurable on-chip network architecture},
  author = {Mehdi Modarressi and Hamid Sarbazi-Azad and Arash Tavakkol},
  year = {2010},
  doi = {10.1145/1837274.1837316},
  url = {http://doi.acm.org/10.1145/1837274.1837316},
  tags = {architecture},
  researchr = {https://researchr.org/publication/ModarressiST10},
  cites = {0},
  citedby = {0},
  pages = {166-169},
  booktitle = {Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010},
  editor = {Sachin S. Sapatnekar},
  publisher = {ACM},
  isbn = {978-1-4503-0002-5},
}