A power minimized 74 fJ/conversion-step 88.6 dB SNR incremental ΣΔ ADC with an asynchronous SAR quantizer

Saqib Mohamad, Chao Wu, Jie Yuan, Amine Bermak. A power minimized 74 fJ/conversion-step 88.6 dB SNR incremental ΣΔ ADC with an asynchronous SAR quantizer. In IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, MD, USA, May 28-31, 2017. pages 1-4, IEEE, 2017. [doi]

@inproceedings{MohamadWYB17,
  title = {A power minimized 74 fJ/conversion-step 88.6 dB SNR incremental ΣΔ ADC with an asynchronous SAR quantizer},
  author = {Saqib Mohamad and Chao Wu and Jie Yuan and Amine Bermak},
  year = {2017},
  doi = {10.1109/ISCAS.2017.8050248},
  url = {https://doi.org/10.1109/ISCAS.2017.8050248},
  researchr = {https://researchr.org/publication/MohamadWYB17},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, MD, USA, May 28-31, 2017},
  publisher = {IEEE},
  isbn = {978-1-4673-6853-7},
}