Prashanth Mohan, Siddharth Das, Ken Mai. A 748 GOPS/W RISC-V SoC with Reconfigurable Custom Instructions via a Synthesized eFPGA with 1.8µs Configuration Time in 22nm FinFET. In IEEE Custom Integrated Circuits Conference, CICC 2025, Boston, MA, USA, April 13-17, 2025. pages 1-3, IEEE, 2025. [doi]
@inproceedings{MohanDM25,
title = {A 748 GOPS/W RISC-V SoC with Reconfigurable Custom Instructions via a Synthesized eFPGA with 1.8µs Configuration Time in 22nm FinFET},
author = {Prashanth Mohan and Siddharth Das and Ken Mai},
year = {2025},
doi = {10.1109/CICC63670.2025.10983466},
url = {https://doi.org/10.1109/CICC63670.2025.10983466},
researchr = {https://researchr.org/publication/MohanDM25},
cites = {0},
citedby = {0},
pages = {1-3},
booktitle = {IEEE Custom Integrated Circuits Conference, CICC 2025, Boston, MA, USA, April 13-17, 2025},
publisher = {IEEE},
isbn = {979-8-3315-1745-8},
}