PVT-tolerant 7-Transistor SRAM Optimization via Polynomial Regression

Saraju P. Mohanty, Elias Kougianos. PVT-tolerant 7-Transistor SRAM Optimization via Polynomial Regression. In International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011. pages 39-44, IEEE, 2011. [doi]

Abstract

Abstract is missing.