VLSI Architecture for High-Speed / Low-Power Implementation of Multilevel Lifting DWT

Basant K. Mohanty, Pramod Kumar Meher. VLSI Architecture for High-Speed / Low-Power Implementation of Multilevel Lifting DWT. In IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006. pages 458-461, IEEE, 2006. [doi]

Abstract

Abstract is missing.