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Saraju P. Mohanty, N. Ranganathan. Energy Efficient Scheduling for Datapath Synthesis. In 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India. pages 446-451, IEEE Computer Society, 2003. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: An ILP-based scheduling scheme for energy efficient high performance datapath synthesisSaraju P. Mohanty, N. Ranganathan, Sunil K. Chappidi. iscas 2003: 313-316 [doi] Energy Efficient Datapath Synthesis Using Dynamic Frequency Clocking and Multiple VoltagesVamsi Krishna, N. Ranganathan, Narayanan Vijaykrishnan. vlsid 1999: 440 [doi] Energy-efficient datapath scheduling using multiple voltages and dynamic clockingSaraju P. Mohanty, N. Ranganathan. todaes, 10(2):330-353, 2005. [doi]
The following publications are possibly variants of this publication: