A real-time digital VCR encode/decode and MPEG-2 decode LSI implemented on a dual-issue RISC processor

Atsushi Mohri, Akira Yamada 0005, Y. Yoshida, Hisakazu Sato, Hidehiro Takata, K. Nakakimura, M. Hashizume, Y. Shimotsuma, K. Tsuchihashi. A real-time digital VCR encode/decode and MPEG-2 decode LSI implemented on a dual-issue RISC processor. J. Solid-State Circuits, 34(7):992-1000, 1999. [doi]

Authors

Atsushi Mohri

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Akira Yamada 0005

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Y. Yoshida

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Hisakazu Sato

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Hidehiro Takata

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K. Nakakimura

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M. Hashizume

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Y. Shimotsuma

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K. Tsuchihashi

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