Hidehiro Takata - researchr alias

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Viewing Publication 1 - 25 from 25

2015

An Extended Direct Power Injection Method for In-Place Susceptibility Characterization of VLSI Circuits Against Electromagnetic InterferenceTakuya Sawada, Kumpei Yoshikawa, Hidehiro Takata, Koji Nii, Makoto Nagata. tvlsi, 23(10):2347-2351, 2015. [doi]

2012

2011

2010

2009

Experimental Evaluation of Dynamic Power Supply Noise and Logical Failures in Microprocessor OperationsMitsuya Fukazawa, Masanori Kurimoto, Rei Akiyama, Hidehiro Takata, Makoto Nagata. ieicet, 92-C(4):475-482, 2009. [doi]

2008

Phase-adjustable error detection flip-flops with 2-stage hold driven optimization and slack based grouping scheme for dynamic voltage scalingMasanori Kurimoto, Hiroaki Suzuki, Rei Akiyama, Tadao Yamanaka, Haruyuki Ohkuma, Hidehiro Takata, Hirofumi Shinohara. dac 2008: 884-889 [doi]

Post-silicon programmed body-biasing platform suppressing device variability in 45 nm CMOS technologyHiroaki Suzuki, Masanori Kurimoto, Tadao Yamanaka, Hidehiro Takata, Hiroshi Makino, Hirofumi Shinohara. islped 2008: 15-20 [doi]

2007

Continuous Design Efforts for Ubiquitous Network Era under the Physical Limitation of Advanced CMOSKazutami Arimoto, Toshihiro Hattori, Hidehiro Takata, Atsushi Hasegawa, Toru Shimizu. ieicet, 90-C(4):657-665, 2007. [doi]

Fine-Grained In-Circuit Continuous-Time Probing Technique of Dynamic Supply Variations in SoCsMitsuya Fukazawa, Tetsuro Matsuno, Toshifumi Uemura, Rei Akiyama, Tetsuya Kagemoto, Hiroshi Makino, Hidehiro Takata, Makoto Nagata. isscc 2007: 288-603 [doi]

2005

A 32×24-bit multiplier-accumulator with advanced rectangular styled Wallace-tree structureNiichi Itoh, Yasumasa Tsukamoto, Takeshi Shibagaki, Koji Nii, Hidehiro Takata, Hiroshi Makino. iscas 2005: 73-76 [doi]

2002

A 99-mm/sup 2/ 0.7-W single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mb embedded DRAM for portable 422P@HL encoder systemSatoshi Kumaki, Hidehiro Takata, Yoshihide Ajioka, Tsukasa Ooishi, Kazuya Ishihara, Atsuo Hanami, Takaharu Tsuji, Tetsuya Watanabe, Chikayoshi Morishima, Tomoaki Yoshizawa, Hidenori Sato, Shin-ichi Hattori, Atsushi Koshio, Kazuhiro Tsukamoto, Tetsuya Matsumura. jssc, 37(3):450-454, 2002. [doi]

2001

2, 0.7-W, single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mbit embedded DRAM for portable 422P@HL encoder systemSatoshi Kumaki, Hidehiro Takata, Yoshihide Ajioka, Tsukasa Ooishi, Kazuya Ishihara, Atsuo Hanami, Takaharu Tsuji, Yusuke Kanehira, Tetsuya Watanabe, Chikayoshi Morishima, Tomoaki Yoshizawa, Hidenori Sato, Shin-ichi Hattori, Atsushi Koshio, Kazuhiro Tsukamoto, Tetsuva Matsumura. cicc 2001: 425-428 [doi]

1999

1991

A Data-Driven Architecture for Distributed Parallel ProcessingToshiyuki Tamura, Shinji Komori, Fumiyasu Asai, Hirono Tsubota, Hisakazu Sato, Hidehiro Takata, Yoshihiro Seguchi, Takeshi Tokuda, Hiroaki Terada. iccd 1991: 218-224

1990

Design of 4-kbit*4-layer optically coupled three-dimensional common memory for parallel processor systemMitsumasa Koyanagi, Hidehiro Takata, Hiroki Mori, Junichiro Iba. jssc, 25(1):109-116, February 1990. [doi]

A 100-mega-access per second matching memory for a data-driven microprocessorHidehiro Takata, Shinji Komori, Toshiyuki Tamura, Fumiyasu Asai, Hisakazu Sato, Takio Ohno, Takeshi Tokuda, Hiroki Nishikawa, Hirofumi Terada. jssc, 25(1):95-99, February 1990. [doi]

1989

1988

An elastic pipeline mechanism by self-timed circuitsShinji Komori, Hidehiro Takata, Toshiyuki Tamura, Fumiyasu Asai, Takio Ohno, Osamu Tomisawa, Tetsuo Yamasaki, Kenji Shima, Katsuhiko Asada, Hiroaki Terada. jssc, 23(1):111-117, February 1988. [doi]

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